New Channel Structure for the Achievement of High Linearity in GaN Transistors

Technology #16166

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Inventors
Professor Tomas Palacios
Department of Electrical Engineering and Computer Science, MIT
External Link (www-mtl.mit.edu)
Dong Seup Lee
Department of Electrical Engineering and Computer Science, MIT
Managed By
Christopher Noble
MIT Technology Licensing Officer - Clean and Renewable Energy
Patent Protection

Improving linearity in semiconductor devices

US Patent Pending 2015-0372081
Publications
Influence of the Dynamic Access Resistance in the gm and fT Linearity of AlGaN/GaN HEMTs
IEEE Trans. Electron Devices, Oct. 2005

Applications

GaN transistors are used in power electronics, power amplification and digital electronics.

Problem Addressed

Gallium Nitride has high electron mobility and a large critical electric field. However, state of the art device characteristics are still below the theoretical expectation based on GaN material properties, and there are several unsolved problems for large-signal RF operation. One of the critical issues is the non-linear behavior of short-channel GaN transistors. In the conventional GaN devices, extrinsic transconductance drops quickly with increasing drain current. This problem becomes more serious as the gate length decreases. The decline in extrinsic transconductance reduces linearity in large signal operation and limits the maximum operation frequency of devices.

Technology

The proposed technology is a new channel structure for nitride semiconductor devices which improves the performance of GaN transistors by extending their regime of linearity while maintaining a large breakdown voltage. The essence of the technology is a transistor where the source access region has a higher current capability than the intrinsic transistor region. This is achieved by reducing the effective channel width in the intrinsic transistor with respect to the source access region. One possible implementation of this technology is the fabrication of a nanowire channel only under the gate, while maintaining planar structure in the access region.

Advantages

  • Minimizes  total current loss 
  • Expands the regime of linearity in transistor
  • Reduces the fringing capacitances and increases RF performance