Asynchronous Digital Communication

Technology #16818

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Inventors
Professor Charles Sodini
Department of Electrical Engineering and Computer Science, MIT
External Link (www-mtl.mit.edu)
Grant Anderson
Department of Electrical Engineering and Computer Science, MIT
Managed By
Ben Rockney
MIT Technology Licensing Officer
Patent Protection

Asynchronous Digital Communication

US Patent Pending

Applications

This technology can be used in

  • Peer-to-peer asynchronous digital communication
  • Body area network communication

Problem Addressed

Digital communication is the backbone of information exchange between any two points or nodes.  These nodes can be integrated circuits on a circuit board, a cell phone and cell tower, or computers on a network. Typically, the digital signals are encoded at the transmitting node with electromagnetic waves and are decoded at the receiving node to retrieve the original message. The knowledge of the timing that is used to encode the original message must be precisely known at the receiving node for an error-free decoding. While some communication schemes send the timing information alongside and independent of the data, i.e. through a “clock” signal, others either embed the timing information within the signal or rely on precision clocks between the two nodes.

Technology

Asynchronous digital communication eliminates the need of timing information at the receiving node for decoding the original message. For example,  in applications such as in body area network communication, the communication function dominates the power consumption of the nodes. Eliminating the requirement of clock alleviates the power budget by reducing the power needs of the timing functions. This technology makes the communication scheme asynchronous through a two-step process. A change in symbol indicates the validity of a new code word, while the value of the code word is contained in the difference between the new code word and the prior one.

Advantages

  • Clock is not required for encoding/decoding
  • Reduces power consumption
  • Reduced overhead in data packets
  • Reduces chip area
  • Reduced design time