Room Temperature and Solventless Fabrication of Air-Stable and Electronic Passivation of Silicon Surfaces

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 Figure 1 . a) The wafer is transferred into iCVD chamber within 3 minutes after HF etching is completed. TBPO and DD are introduced se parately to prevent the formation of polymer. A vapor mixture of TBPO and EGDA is used in Process B, which results in iCVD polymerization. With the surface vinyl groups generated during Process A, the polymer is grafted onto the Si substrate; otherwise only dispersion forces present between the polymer fi lm and the substrate. b) Si (2p) XPS spectrum of the surface resulted from Process A. The samples have been exposed to air pr ior to XPS measure- ments, but the growth of oxide is inhibited by the iCVD passivation. c) Refl ection spectrum of the surface resulted from Process B. The 200 nm ARC is grafted on Si via iCVD passivation layer. The refl ection at the wavelength with maximum solar irradiance is suppressed.
Categories
Inventors
Professor Karen Gleason
Department of Chemical Engineering, MIT
External Link (web.mit.edu)
Professor Anthony Buonassisi
Department of Mechanical Engineering, MIT
External Link (pv.mit.edu)
Rong Yang
Chemical Engineering, MIT
Yaron Segal
Photovoltaics Research Laboratory, MIT
Managed By
Christopher Noble
MIT Technology Licensing Officer - Clean and Renewable Energy
Patent Protection

Fabrication & Passivation of Silicaon Surfaces

US Patent Pending 2014-0186620
Publications
Organic Vapor Passivation of Silicon at Room Temperature
Advanced Materials, Volume 25, Issue 14, Pages 2078-2083

Applications

Passivation of silicon surfaces is of key importance in the semiconductor and photovoltaic industries. The chemical and electrical passivation of silicon surfaces are of particular interest for applications including flexible electronics, photovoltaics (PVs), high-density memory storage and (bio)sensors.

Problem Addressed

The surface recombination of minority carriers is one of the major efficiency loss mechanisms in photovoltaics. This high-quality electronic passivation layer reduces the number and cross section of recombination sites on the semiconductor’s surface which can increase overall efficiency in applications such as photovoltaics.

Technology

The rate of surface recombination of minority carriers is quantified by the surface recombination velocity. For silicon-based PV applications, a desirable recombination velocity is around 10cm s-1, which corresponds to a surface defect density on the order of 10-5. This technique uses a wet chemical reaction to form an organic molecular passivation layer starting with a chemical etching step of silicon oxide to obtain H-terminated Si surfaces. After chemical etching, the passivation is carried out in a single chemical vapor deposition (CVD) chamber, with the reactants delivered in a gas phase. The resulting passivation layer is stable in air, with about 10% loss in the minority carrier lifetime and the lowest surface recombination velocity is less than 10 cm s-1 over 200 hours of air contact.

Advantages

  • Simplified reaction scheme
  • Inexpensive reactants
  • Excellent long-term stability
  • Decreases minority carrier combination